Hi -

I know memory mapped IO is about mapping device/controller registers to
memory space in order to reduce the number of processor instructions
(and simplify device driver writing) . My question is: are device
registers mapped to virtual memory or physical memory? I suspect the
former, and I have looked up a number of texts but everyone just seems
to skirt about the issue.

Thanks,

- Olumide

Olumide wrote:
virtual memory using normal paging techniques, AFAIK.

"Eli Gottlieb" <eligottlieb@gmail.com> wrote in message
news:FR4Ef.1708$5Q3.1219@twister.nyroc.rr.com...
Correct for real, physical devices in non-virtualized environments. If we go
for virtual ones, we may never know what is real and what is emulated in
some way (e.g. a page fault handler would do the emulation).

Alex

Olumide wrote On 02/01/06 10:49,:
How could device registers inhabit virtual memory?
That'd require every device to be sensitive to the MMU,
would insert the device registers into every process'
address space, would make machines with multiple CPUs
(more specifically, multiple MMUs) either impossible or
woefully inefficient, would make it impossible or very
difficult to change MMU settings while any device was
active, and would bring about the end of civilization as
we know it ;-) Device registers inhabit physical memory
space; devices that do DMA generally do so to and from
physical-memory buffers.

That said, the CPU usually reads and writes virtual
addresses that are translated to physical addresses by
the MMU. So if the CPU is to access device registers,
it must configure the MMU so that it has a virtual-to-
physical mapping that associates some virtual address
with the physical address of the target register. In
that sense, device registers inhabit virtual memory --
but in that sense, RAM inhabits virtual memory, too.

--
Eric.Sosman@sun.com

Alexei A. Frounze wrote:
it? Theoretically, the same software should run on both. If it
doesn't, then I see no point in the virtualization, as it would just be
the creation of an arbitrary hardware platform that doesn't have any
real hardware.

They are mapped to physical by hardware, and then also to virtual by the
OS - by a call like Windows's MmMapIoSpace.

--
Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
maxim@storagecraft.com
http://www.storagecraft.com

"Olumide" <50295@web.de> wrote in message
news:1138808976.217767.140250@z14g2000cwz.googlegr oups.com...

Eric Sosman wrote:
Thanks Eric!

Eric Sosman wrote:
Thanks Eric!

"Eli Gottlieb" <eligottlieb@gmail.com> wrote in message
news:EW5Ef.1712$5Q3.733@twister.nyroc.rr.com...
It starts gaining some real importance in the business solutions (putting a
few servers that would otherwise run on different machines to one; untying
from particular hardware and making it possible to move the server to
another machine in a matter of minutes (well, maybe a few hours), to
replicate it, to back it up, to do all kinds of things that would otherwise
be hard to do with something real). And then there are applications for
which running in a virtualized environment is more secure (think of the
internet browser with all its bugs and vulnerables).

Right.

You may underestimate it. While it doesn't make sense now, it may make a lot
of sence some time later. But as I told you, untying the software from the
particular devices makes it more portable.

Alex

In article <drqmfo$9k3$1@news1brm.central.sun.com>,
Eric Sosman <eric.sosman@sun.com> writes:
Look up DVMA (Direct Virtual Memory Access). Some systems
allow devices to deal in virtual memory addresses, passing
their address requests through the MMU to resolve them.
That means that a mapping of not necessarily contigous
physical pages to a contiguous range of virtual memory
can be done, and the device doesn't need to be able to
do scatter/gather operations (list of pages to transfer
to/from all at once). The old sun4m (SPARC/Sbus) systems
typically worked like that.

However, that may well be fairly unusual; many systems
may well require the device to work in terms of physical
memory addresses; but as long as the OS hides all this
from the application, unless you're writing a device
driver, it shouldn't be a big deal one way or the other.

Well, between the device possibly being able to reference
virtual memory addresses, and the user program being able
to reference virtual memory addresses to access the device,
unless you're writing kernel code, the distinction hardly
matters, does it?

All this could indeed get more complicated on a multiprocessor
system, which is why designing them so that multithreaded
apps scale almost linearly with number of CPUs is so difficult.

--
mailto:rlhamil@smart.net http://www.smart.net/~rlhamil

Lasik/PRK theme music:
"In the Hall of the Mountain King", from "Peer Gynt"

Windows supports this fully with their notion of "adapter object" and "logical
address" (the device-side address).

More so: AGP bus works exactly this way, its "MMU" is called GART - Graphics
Address Remap Table or such. The organization of this table is
chipset-specific, and thus the "AGP driver" for Windows.

--
Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
maxim@storagecraft.com
http://www.storagecraft.com

Maxim S. Shatskih wrote On 02/07/06 17:09,:
Well, I guess there are more things in Heaven and
Earth than are dreamt of in my philosophy. Seems like
an awfully strange way to arrange things -- but live
and learn. What will they think of next? And is there
the faintest chance it will make sense? ;-)

--
Eric.Sosman@sun.com

In article <dsb7pp$o9b$2@news1brm.central.sun.com>,
Eric Sosman <Eric.Sosman@sun.com> writes:
Time makes all things make sense, or at least allows one to discover
perspectives under which someone might have thought they made sense.
That is, it isn't always what they'll think of next, it may be what
they already thought of some time back.

(I'm assuming that someone who works for Sun, but didn't already have
the sun4m DVMA counter-example staring them in the face, is younger than
I am...)

I wonder if cache coherency issues didn't kill some of these things.

When someone comes up with really fast memory that's still low power and
very high density, and maybe some really slick electrical/optical
components, allowing optical memory interconnects (so distance won't
matter so much), it seems like it will cut so much complication out;
wouldn't have to work so damn hard on cache coherency if you didn't need a
cache, NUMA would only be needed with geographic level redundancy, etc. :-)


But from what I gather the poster that mentioned Windows was saying, both
operating systems (Solaris and Windows) have frameworks that allow for the
possibility of devices operating either in terms of physical or virtual
addresses, at least in some cases. So potentially they both serve to
abstract the hardware in that way as in so many others.

--
mailto:rlhamil@smart.net http://www.smart.net/~rlhamil

Lasik/PRK theme music:
"In the Hall of the Mountain King", from "Peer Gynt"

Olumide wrote:
driver writing', I'd counter by saying 'produce a driver that works only
on the platform and OS version you develop it on'

The OS provides you with and API to protect you form the shifting sands
of kernel updates and endian issues.

--
Ian Collins.