Hi all,

i am now trying to learn about power management, but so far it seems an
order of magnitude more complex than PNP, and there are some things that are
not clear:

- why are there 2 power states (S and D)? wouldn't it make sense to have
only S states? they have to be translated to D states and then forwarded, so
that seems a bit redundant.

- why are S IRP's passed down? they are normally handled by the function
driver who translates them to D states and requests the D IRP's. in that
case the lower drivers should no even know of S IRP's.

- the DDK (and oney's book) say that you should never block during a power
IRP, but why does that limitation exist? you are free to block PNP IRP's, so
why has microsoft put that restriction on power IRP's. doing anything
usefull in power management code leadsto a complex system of completion
routines and DPC's.
does all this complexity sere any usefull purpose?

- why do S and D IRP's have to be handled in parallel? wouldn't it make life
easier to serialize them?

apologies if these questions seem a bit 'whiny' but i really don't
understand why it has to be so complex.

kind regards,
Bruno.

S states are the states of the whole machine, defined by the ACPI spec.

D states are the states of the particular device. They are usually (IIRC)
defined in the bus specific chapters of the ACPI spec.

The mapping of S to D depends upon some factors. For instance, it depends upon
mobo capabilities - can it hold power on PCI slots in Suspend state or it can
only hold the standby power on them? And so on.

Also it depends on whether the wakeup is enabled to the device. If wakeup is
enabled - then the device (and the whole its physical attachment chain) must
never go to sleep deeper then the state from where the wakeup is possible.
Usually, enabling wakeup from the device like the USB mouse even imposes the
system-wide veto on some power states - like S3. Without the USB mouse with
wakeup enabled, you have Standby = S3. With it, you have Standby = S2, since
the laptop cannot power the USB host in S3.

By the power policy owner.

They are passed down for flexibility and ability to filter the PPO's state
changes.

They are often sent at DISPATCH_LEVEL. And, even if they are sent on
PASSIVE_LEVEL, blocking there can cause a deadlock - Walter's book describes
this.

The devnode can have only 1 outstanding D IRP. As about the S IRP, there is
only 1 outstanding S IRP in the whole system, which travels over the whole PnP
tree. Also, since the S IRP is pended while its "child" D IRP runs, you have no
issues in races between S and D IRPs.

--
Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
maxim@storagecraft.com
http://www.storagecraft.com

For a great many devices, no not really.

The whole PnP/Power design is really poor. BTW, it is nearly, but not
quite, impossible to synchronize I/O with Pnp/Power, which most samples get
wrong, and few people realize. Unfortunately, PnP/Power are tied in
numerous undocumented ways as well.

Microsoft is working on a new driver framework WDF, which is in beta right
now, which attempts to remove the whole PnP and Power headache from the
driver developer. I believe they realized during WDF development just how
impossible they made WDM. They state machined the whole Pnp/Power setup and
ended up with over something like 200 states! Just a few more states than
you see in most diagrams on the subject.

I know this doesn't help you now, but you might check out the WDF beta if
interested: http://www.microsoft.com/whdc/driver/wdf/beta.mspx.

--
Bill McKenzie


"Bruno van Dooren" <microvax@hotmail.com> wrote in message
news:egApcEtZFHA.2940@tk2msftngp13.phx.gbl...

you only recieve power irps at dispatch_level if DO_POWER_PAGABLE is not set
in your DeviceObject->Flags. typically, this flag is set unless you are in
the hiber/paging/crash dump path.


S0 irp has completed back to your device, that you request the D0 irp and
then let the S0 irp complete up the stack while you are processing the D0
irp. thismeans that while you are processing the D0 irp, another Sx irp can
come into the stack. BUT, it is not that bad b/c you can only have on D irp
in the stack at once and the requested Dx irp will not appear until the D0
irp has completed

d

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This posting is provided "AS IS" with no warranties, and confers no rights.


"Maxim S. Shatskih" <maxim@storagecraft.com> wrote in message
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