- Design: High-Speed, High-Volume Digital Input
- Posted by Chessaurus on March 23rd, 2005
I need a build or buy a system that can record digital transmissions on
a 4-bit proprietary bus. The bus transmissions occur roughly every
300us, and the transmissions are short 10MHz bursts. Through whatever
means necessary, I need to store a minute's worth of this data to a
file that I can access from a PC. Of course, this would require lower
data storage volume if the device is able to sense transitions on the
bus, instead of just storing regular, time-sampled data.
I've considered buying National Instruments' High Speed Digital I/O
boards, but -- I figured I should ask around to see if there are
better, more turn-key solutions available. Maybe something like a
specialized logic analyzer?
Any help will be greatly appreciated. -Zach
- Posted by Thomas Magma on March 23rd, 2005
OK so you are trying to store bursts of data from a 4 bit bus that occur
every 300us.
1)When you say "short 10MHz bursts" do you mean that the data rate is 10
Mega nibbles per second?
2)How long is the burst length?
3)Is the burst length a constant?
4)What is the static condition of the bus in-between bursts?
5)Does the leading nibble of every burst always differ from the static
condition of the bus?
6)Is the solution meant for production or just a one time thing?
Thomas
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- Posted by CBFalconer on March 23rd, 2005
Chessaurus wrote:
The first thing to characterize is throughput, in bits (or bytes)
per second. The second thing is the maximum burst data rate. How
much total data (max) is appearing in that 300 uS period. 10 Mhz
burst means very little, is that 10 M bits/second, nibbles (4bits)
per second, or what. Depending on these you can calculate the
storage and data rates needed. Another thing is the 'dead'
periods. Can the system accumulate the one minutes worth, and then
just devote itself to unloading for a period?
For example, if the 10 Mhz is bits/second, appearing 4 bits
parallel, you have 250 nS in which to grab and store them. If you
make some hardware (a PLA for instance) you might collect two
nibbles into an octet, and store that every 500 nS for the bursts.
You have to include the time for testing burst completion, etc. in
the loop. But you can't even start without proper specifications.
You may or may not find you can handle it with just a simple
processor.
--
Chuck F (cbfalconer@yahoo.com) (cbfalconer@worldnet.att.net)
Available for consulting/temporary embedded and systems.
<http://cbfalconer.home.att.net> USE worldnet address!
- Posted by Chessaurus on March 23rd, 2005
I appeciate your the feedback I'm getting...
1) Yes, I am meaning that the bursts produce data at 10 Mega nibbles
per second.
2&3) The burst length will be exactly 20 bytes long (40 nibbles), with
a control nibble at the beginning to indicate the start of a burst.
4) All 4 lines go low at the end of a burst
5) Yes, the leading nibble is a control nibble (all ones).
6) Not exactly production, but for a specialized test rig for a device
that will be in production.
Again, appreciate your help.
-Zach
- Posted by Chessaurus on March 23rd, 2005
Chuck, thanks for helping me specify this in better detail.
The burst transfer rate will be 5 megabytes per second (10 mega nibbles
per second). There are a total of 20 bytes transferred per burst, so
the throughput is (1 / 300us) * 20 = 60,000 bytes/ sec. Storing this
for one minute will require 7 MB of storage... After the capture is
complete, the device could chug away indefinitely when sending it to
the PC.
Given these specs, are there any off the shelf solutions that come to
mind? Unforunately, I haven't been able to find anything (like a logic
analyzer) that will enable me to rapidly prototype this, so I'm afraid
I'll have to build it. If I build it, I was thinking I'd use an FPGA
to read the bus, and a microcontroller with an ethernet controller to
send it to a PC. The ethernet controller may be a little bit
overboard, but if I'm going to have to build something, I might as give
it the capability to send real-time data to the PC.
-Zach
- Posted by Dejan on March 23rd, 2005
"Chessaurus" <chessaurus@yahoo.com> wrote in message
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Look here http://www.tech-tools.com/dv_main.htm under hardware compression
- they have innovative approach allowing high volume of data with 10nS
resolution...
- Dejan
- Posted by Thomas Magma on March 24th, 2005
"Off-the-shelf" will save you a lot of time and money when trying to solve
this particular problem.
This first link is over-kill.
http://www.innovative-dsp.com/products/lobo.htm
This one would be a lot cheaper.
http://www.innovative-dsp.com/products/lobo.htm
In fact just give the requirements to the engineers over at innovative-dsp
and they will tell you exactly what hardware you will need and how to
implement it.
Thomas
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- Posted by Jim Granville on March 24th, 2005
Chessaurus wrote:
Interesting mix of speeds - the 10Mnps is just above simple uC, but the
60KBps is easier - I'd look at a vero-asm of some std logic FIFOs
(HCT40105 x 3) and something like SiLabs C8051F064DK, which has USB
link, and buffer RAM.
If you want to store, instead of streaming over the USB, you'll add
something like an Atmel DATA Flash, or two.
-jg
- Posted by MetalHead on March 24th, 2005
Chessaurus wrote:
I would concatenate a pair of four bit samples into a single 8 bit
sample and use a commercial high speed data acquisition board.
I recently did a project that did almost exactly what you are
describing, except is was a continuous stream of 4 bit samples, combined
with serial data and time stamp information from a GPS receiver. The
data rate was about 16.4 megasamples/second. After concatenating the
samples, I fed the data into an Adlink 7300B High speed data acqisition
board. Using their C library, I wrote a two buffer handler program that
would allow one buffer to be filled while the other was being written
out to disk and then interchange when the filling buffer fills up. This
allowed continuously capturing data up to the limit of the hard disk or
my patience. We routinely gathered multi-gigabyte files with this setup.
If you don't need to do timestamping or anything, the concatenator would
be easily built with a pair of 74act374's, a couple of 74act74's and
maybe a gate or two.
The Adlink boards are considerably cheaper than National Instruments,
but their C library was poorly documented and kind of painful to use.
Good Luck,
Bob
- Posted by CBFalconer on March 24th, 2005
Chessaurus wrote:
See my sig below for the proper use of google groups. Lack of
quoting makes articles almost useless.
Your plan sounds reasonable. You don't say how the data is
clocked. You will need timing diagrams, specifying hold times
etc. I would expect a PLA to suffice for the gathering and
packing, but overspecification for a one-off (or even a ten-off)
can't hurt. It will not hurt if the front end device can capture
the full burst and allow the remainder of the 300 uS for the
software to transfer it. The total storage is only 3.5 MB
according to me, and the Ethernet connection may not be able to
keep up, depending on other users, business, etc. If you can you
would be better off planning to store the whole burst on the
interface, and unloading it at leisure. Memory is pretty cheap
these days.
--
"If you want to post a followup via groups.google.com, don't use
the broken "Reply" link at the bottom of the article. Click on
"show options" at the top of the article, then click on the
"Reply" at the bottom of the article headers." - Keith Thompson
- Posted by Chessaurus on March 24th, 2005
Thanks, all. I really appreciate your input. It will take me a little
while to investigate all of these great suggestions. I'll post a
summary of my findings in a few weeks.
-Zach
- Posted by RS on March 29th, 2005
Dear Zach.
I saw many posts here with solutions, but all of them are too complicated! I
think your solution is:
Part1-A XILINX CPLD like coolrunner II has dual edge flipflops, so everytime
a bit change to low or hi, you'll have and event or you can use a 95XL
family that's 2.5 to 5volt tolerant and program it for dual edge feeding a 8
bit communication channel to a PC.
Part2-A experimental board (very cheap!!!) for USB connection with fifo and
windows drivers that simulate a serial port up to 921kbps like this here:
http://www.dlpdesign.com/usb/usb245.html
NOTE:Power supply comes from the usb port using a 3.3v regulator.
Part3-An off the shelf serial port logging software or your own with VB, VC,
or whatever you are confortable!
Part4-(Optional)A bare bone PCB made in 24h from www.pcbexpress.com
Part5-Done in 12h for less than $120!!!!!!!!
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