- FIFO Memory
- Posted by amerdsp on August 11th, 2007
Greetings,
Can anyone explain to me why many FIFO's have widths multiples of 9
bits instead of 8? eg. 64Kx18 or 1Kx36...
Thanks,
-- A
- Posted by TT_Man on August 11th, 2007
"amerdsp" <amerdsp@hotmail.com> wrote in message
news:1186814824.513665.115920@k79g2000hse.googlegr oups.com...
- Posted by John B on August 11th, 2007
On 11/08/2007 amerdsp wrote:
Parity.
--
John B
- Posted by GMM50 on August 11th, 2007
On Aug 11, 2:47 am, amerdsp <amer...@hotmail.com> wrote:
Because the user (or application) needs 9 bits.
Perhaps for parity.
I know of instruments need 9, 10 or perhaps 12 bits of data. No need
to have extra ICs in that memory.
gm
- Posted by Zara on August 13th, 2007
On Sat, 11 Aug 2007 06:47:04 -0000, amerdsp <amerdsp@hotmail.com>
wrote:
Parity bit, or extra bit to differentiate between control and data...
whatever the application may seem fit.
But as there are a lot of applications using that extra bit, chip
manufacturers have thoguht sensibly tthat it was better to support
only 9 bit multiples as 8 bit multiples are included, and not the
other way round...
regards
- Posted by Jim Stewart on August 13th, 2007
TT_Man wrote:
I think there's also a couple historical reasons.
Back in the good ole days, 9-track tape drives
needed a fifo for deskewing the data. So the fifos
all had a width of nine bits so they could be used
for that application.
Also Sony, in the 80's, felt that the lowest number
of bits needed to do a straight capture of broadcast
quality analog video was nine. I'm guessing that
this created at least a small market for fifo chips
in time base correctors and the like.
- Posted by karthikbalaguru on August 14th, 2007
On Aug 11, 11:47 am, amerdsp <amer...@hotmail.com> wrote:
It can be for defining the DL/UL direction, Control/Status Register ,
R/W Operation, Parity Bit.
Karthik Balaguru