Can anyone reccomend some microcontrollers/microprocessors with 3 or
more SPI controllers ?
The only one I have found so far is the ST STR73xF ARM Microcontroller
( 3 x SPI).

RR

RR wrote:

The Freescale MC9S12XDP512 also has 3.

In article <1169200047.882264.52700@11g2000cwr.googlegroups.c om>,
"RR" <richardrooney@icecomms.net> wrote:

No. Most often, one can put a large number of slave
devices on a single SPI controler; and it is unusual for
a slave device to be hooked to more than one master.
Thus it it rare to need more than 2 SPI controllers
(one master, one slave).

And it is often adequate to implement an additional master
SPI port in software (very easy, interrupt-compatible
except if the slave device implements a timeout, often
as fast as a hardware implementation).

Francois Grieu

RR wrote:
Chek out TI's TMS320F2808. it has 4 SPI's 2 SCI's and 2 CAN's. You have
to check PIN mapping as some functions are pultiplexed on the same
pins.

Regards, Mitja

RR <richardrooney@icecomms.net> wrote:
Some of the Freescale Star12s have lots (up to 5 I think). Very cheap,
nice to program, good dev tools and no hidden horrors.

pete
--
pete@fenelon.com "it made about as much sense as a polythene sandwich"

No. I have 32 SPI slaves to connect, so these on one port would not run
very fast because of the loading factor.
I would like to partition my loads across as many SPI ports as
possible.
RR


Francois Grieu wrote:

Andy Sinclair wrote:
SPI is also easy to bit bang - you could find a micro with lots of
ports and offload the SPI handling chores to it.

Bob Stephens

"RR" <richardrooney@icecomms.net> a écrit dans le message de news:
1169200047.882264.52700@11g2000cwr.googlegroups.co m...
Hi Richard,
In addition to the previous answers another option could be to use a FPSLIC
from Atmel (µC+FPGA in one chip) and to build as many SPI ports as you want
in the FPGA...
Yours,
Robert
www.alciom.com

Robert Lacoste wrote:

That is an idea, but the FPSLIC is relatively pricey. On the other
hand, the PSOC from Cypress is *very* low cost and affords similar
ability to add multiple SPI ports. I don't recall just how many you
can add, but it is at least 4 and less than 32. :^)

BTW, I am a bit confused about the statement of "loading" on the SPI
bus slowing it down. You can use a combination of serial and parallel
connections to put all 32 devices on the SPI without excessive loading
of the bus. I guess you might need to use buffers on the clock and SEL
lines. How do you plan to use these 32 devices? Do you need to update
all 32 together or will you be "addressing" them randomly?

On 19/01/2007 rickman wrote:

..
..
..
I suspect the OP means software loading rather than hardware loading.

It must be quite a sight having 32 SPI devices on one master. I think I
would go for a CAN controller as master and have some CAN slaves
operating as SPI distributors. That would probably be fast enough.

--
John B

RR wrote:
What sort of SPI slaves ? Devices / data rates ?

You may also be able to use SSC controllers, as SPI masters, and
some devices list those separately from SPI peripherals.

Loading can be solved with buffers/multiplexers - and that may
avoid your processor choice being dictated by SPI port count ;

Some SPI devices can cascade/daisychain, which is becomming
a more common usage ( similar to the jellybean shift registers
such as 4094 / HC595 )

Only is you really need very high bandwidths, would multiple-SPI ports
be the only solution.

-jg

<StephensDigital@gmail.com> wrote in message
news:1169217910.332202.158150@q2g2000cwa.googlegro ups.com...
requirement (for instance the Microchip ENC28J60 ethernet controller). It's
rather difficult to bit bang large transfers at speeds in excess of 6Mhz,
and still have time to do anything else.

Bit banging device drivers do not cooperate well with operating systems
either, be it Linux or an RTOS. There's no DMA or interrupt service.
Jack Peacock

"rickman" <gnuarm@gmail.com> a écrit dans le message de news:
1169240605.658686.17330@v45g2000cwv.googlegroups.c om...
That's fully right : On a high range PSoC (like the CY8C29666, with 16
digital blocks) you can have at least up to 4 SPI master interfaces... More
precisely PSoC Designer seems to allow you to place up to 8 SPIM blocks, but
the datasheet states that you can have up to 4 SPIM (master) and 4 SPIS
(slave)...

Friendly,
Robert

Another option with 3 SPI, the LPC2300 family from NXP. Also they have
very low cost, fast devices the LPC2101 with 2 SPI interfaces. This
device is an ARM7 running at 70 MHz for $2.52 if you buy 25 at Digikey
or less than $2 for more than 100 devices.

Just a thought, An Schwob