I just read an interesting paper about high-speed I/O's power dissipation.
Unfortunately there is an equation I don't quite understand. Maybe someone
is in the mood for discussing and explaining the correctness of the equation
to me.
The formula I am talking about is (1) in the paper [
http://www.ee.ucla.edu/faculty/paper...s2_nov2006.pdf ]

For high-common mode signaling (which standard would that be, anyway? TTL?
CMOS? SSTL?) it is assumed
P = V*Vswing/Z0 = V*Vrx/Z0*H(f)

For low-common mode signaling (LVDS? CML? LVPECL?) it states
P = Vswing^2/2*Z0 = Vrx^2/2*Z0*H(f)^2

What I don't understand is the factor 2 (2*Z0) in the calculation of the
low-common mode signaling. Furthermore I'm not sure if the H(f)^2 is
correct.

Any help is highly appreciated! Thanks a lot in advance!

Regards, Gero

"Geronimo Stempovski" <geronimo.stempovski@arcor.de> wrote in message
news:45c996d0$0$30311$9b4e6d93@newsspool1.arcor-online.net...
I don't know the topic or the equation in question, however,

P = Vpeak/sqrt(2) * Vpeak/sqrt(2) / R = Vpeak^2 / 2 * R
would give power for a simple AC voltage applied to an R. Here the
factor of 2 is 'changing' the voltages to their RMS values. Could it
be similar in the equation you are looking at?

"operator jay" <none@none.none> schrieb im Newsbeitrag
news2iyh.66715$sE7.14995@newsfe21.lga...
Thank you, Jay. Unforutnately not. Could I mail you the paper and you have a
look at it? What's your email adress? My email adress is valid, by the way.

Geronimo Stempovski wrote:
That does seem mangled.
When in doubt, check the dimensions of the answer ?

Normally where frequency is used in power calcs, it is of the form
of power dissipation capacitance : W = Fo * Cp * Vcc^2

-jg

Jim Granville wrote:
it looks like its analagous to an RMS calculation, but made on an
unknown dataset of a particular (hardware) flavour. its a mere proof by
blatant assertion, so it'd take a fair bit of digging or maths to figure
out where it came from.

ya gotta love professional comics.

Cheers
Terry